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MAX17497A/max17497b ac-dc and dc-dc peak-current-mode converters with integrated step-down regulator maxim integrated products 1 19-5981; rev 0; 11/11 ordering information appears at end of data sheet. for related parts and recommended products to use with this part, refer to www.maxim-ic.com/MAX17497A.related . general description the MAX17497A/max17497b include both a current- mode fixed-frequency pwm converter and a synchro - nous step-down regulator. they contain all the control circuitry required to design wide-input-voltage noniso - lated power supplies to supply multiple output rails for smart meters, industrial control, and other similar applica - tions. the MAX17497A has its rising/falling undervoltage lockout (uvlo) thresholds optimized for universal offline (85v ac to 265v ac) applications, while the max17497b supports undervoltage lockout (uvlo) thresholds suit - able to low-voltage dc-dc applications. both devices also include a 3.3v fixed-output synchronous step-down regulator that delivers up to 600ma load current. the switching frequency of the MAX17497A flyback converter is 250khz, while the max17497b flyback/ boost converter is 500khz. the internally compensated synchronous step-down regulator switches at 1mhz on both versions. these frequencies allow the use of tiny magnetic and filter components resulting in compact, cost-effective power supplies. an en/uvlo input allows the user to start the power supply precisely at the desired input voltage, while also functioning as an on/off pin. the ovi pin enables implementation of an input overvoltage- protection scheme that ensures the converter shuts down when the dc input voltage exceeds the desired maximum value. programmable current limit allows proper sizing and protection of the primary switching fet. the max17497b supports a maximum duty cycle of 93% and provides programmable slope compensation to allow optimization of control loop performance. the MAX17497A supports a maximum duty cycle of 49%, and has a fixed internal slope compensation for optimum control loop perfor - mance. the devices provide an open-drain resetn pin that serves as a power-good indicator and enters the high-impedance state to indicate that the flyback/boost converter and 3.3v step-down regulator outputs are in regulation. an ssf pin allows programmable soft-start time for the flyback/boost converter, while an internal digital soft-start is employed for the 3.3v step-down regu - lator to limit inrush current. hiccup mode overcurrent pro - tection and thermal shutdown are provided to minimize dissipation under overcurrent and overtemperature fault conditions. the devices are available in a space-saving 16-pin (3mm x 3mm) tqfn package with 0.5mm lead spacing. benefits and features s reduced component count and board space ? flyback/boost with integrated internally compensated step-down regulator ? no current-sense resistor ? space-saving 16-pin (3mm x 3mm) tqfn package s minimal radio interference ? 250khz switching in offline version minimizes interference with radio receivers in smart meter applications s reduced inrush current ? programmable flyback/boost soft-start ? internal digital soft-start for step-down regulator s reduced power dissipation under fault ? hiccup mode overcurrent protection ? thermal shutdown with hysteresis s robust protection features ? flyback/boost programmable current limit ? input overvoltage protection s optimized loop performance ? programmable slope compensation for flyback/boost maximizes obtainable phase margin s high efficiency ? 150m i , 65v-rated nmosfet offers typical flyback converter efficiency greater than 80% ? 3.3v step-down regulator efficiency greater than 90% s optional spread spectrum applications ac-dc power supplies for smart meter applications universal-input offline ac-dc power supplies wide-range dc input flyback/boost industrial power supplies evaluation kit available for pricing, delivery, and ordering information, please contact maxim direct at 1-888-629-4642, or visit maxims website at www.maxim-ic.com. www.datasheet.co.kr datasheet pdf - http://www..net/
ac-dc and dc-dc peak-current-mode converters with integrated step-down regulator MAX17497A/max17497b maxim integrated products 2 in to sgnd ............................................................ -0.3v to +40v en/uvlo to sgnd ....................................... -0.3v to v in + 0.3v ovi to sgnd ............................................... -0.3v to v cc + 0.3v v cc to sgnd .......................................................... -0.3v to +6v ssf, rlimf, eafn, compf, scompf to sgnd ............................................... -0.3v to (v cc + 0.3v) lxf to sgnd ......................................................... -0.3v to +70v inb to sgnd ......................................................... -0.3v to +26v lxb to sgnd .............................................. -0.3v to v inb + 0.3v outb to sgnd ....................................................... -0.3v to +6v resetn to sgnd .................................................... -0.3v to +6v pgndf, pgndb to sgnd ................................... -0.3v to +0.3v continuous power dissipation (single-layer board) tqfn (derate 20.8mw/ n c above +70 n c) (note 1) ... 1700mw operating temperature range ........................ -40 n c to +125 n c storage temperature range ............................ -65 n c to +160 n c junction temperature (continuous) ................................ +150 n c lead temperature (soldering, 10s) ................................ +300 n c soldering temperature (reflow) ...................................... +260 n c absolute maximum ratings note 1: package thermal resistances were obtained using the method described in jedec specification jesd51-7, using a four- layer board. for detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial . stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress ratings only, and functional opera - tion of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. electrical characteristics ( v in = +15v, v en/uvlo = +2v, compf = open, c in = 1 f f, c vcc = 1 f f, t a = t j = -40 n c to +125 n c, unless otherwise noted. typical values are at t a = +25 n c.) (note 2) parameter conditions min typ max units input supply ( v in ) in voltage range (v in ) MAX17497A 4.5 29 v max17497b 4.5 36 in supply startup current under uvlo i instartup , v in < uvlo or en/uvlo = sgnd 22 36 f a in supply current (i in ) switching, f sw = 250khz (MAX17497A) 2.75 4.5 ma switching, f sw = 500khz (max17497b) 3 5 in boostrap uvlo rising threshold MAX17497A 19 20.5 22 v max17497b 3.9 4.15 4.4 in bootstrap uvlo falling 3.65 3.95 4.25 v en/uvlo threshold rising 1.18 1.23 1.28 v falling 1.11 1.17 1.21 en/uvlo input leakage current 0v < v en/uvlo < 1.5v, t a = +25 n c -100 0 +100 na ldo v cc output voltage range 6v < v in < 29v, 0ma < i vcc < 50ma 4.8 5 5.2 v v cc dropout voltage v in = 4.5v, i vcc = 20ma 160 300 mv v cc current limit v cc = 0v, v in = 6v 50 100 ma overvoltage protection ovi threshold rising 1.18 1.23 1.28 v falling 1.11 1.17 1.21 ovi masking delay 2 f s ovi input leakage current 0v < v ovi < 1.5v, t a = +25 n c -100 0 +100 na www.datasheet.co.kr datasheet pdf - http://www..net/
ac-dc and dc-dc peak-current-mode converters with integrated step-down regulator MAX17497A/max17497b maxim integrated products 3 electrical characteristics (continued) ( v in = +15v, v en/uvlo = +2v, compf = open, c in = 1 f f, c vcc = 1 f f, t a = t j = -40 n c to +125 n c, unless otherwise noted. typical values are at t a = +25 n c.) (note 2) parameter conditions min typ max units flyback/boost converter flyback/boost switching frequency MAX17497A 235 250 265 khz max17497b 470 500 530 flyback/boost maximum duty cycle f sw = 250khz (MAX17497A) 47.5 48.75 50 % f sw = 500khz (max17497b) 88 92 96 ssf pullup current v ssf = 400mv 9 10 11 f a ssf set point voltage 1.18 1.23 1.28 v ssf peak current-limit enable threshold 1.11 1.17 1.21 v eafn input bias current 0v < v eafn < 1.5v , t a = +25 n c -100 +100 na error-amplifier open-loop voltage gain 90 db error-amplifier transconductance v compf = 2v, v rlimf = 1v 1.5 1.8 2.1 ms error-amplifier source current v compf = 2v, v eafn = 1v 80 120 210 f a error-amplifier sink current v compf = 2v, v eafn = 1.5v 80 120 210 f a current-sense transresistance 0.45 0.5 0.55 i in clamp voltage en/uvlo = sgnd, i in_ = 1ma (MAX17497A) (note 3) 31 33.5 36 v lxf dmos switch on-resistance (r dson_lxf ) i lxf = 200ma 175 380 m i lxf dmos peak current limit rlimf = 100k 1.62 1.9 2.23 a lxf dmos runaway current limit rlimf = 100k 1.9 2.3 2.6 a lxf leakage current v lxf = 65v, t a = +25 n c 0.1 2 f a peak switch current limit with rlimf open 0.35 0.45 0.54 a runaway switch current limit with rlimf open 0.39 0.5 0.6 a rlimf reference current 9 10 11 f a number of flyback/boost peak current-limit hits before hiccup timeout 8 # number of flyback/boost runaway current-limit hits before hiccup timeout 1 # www.datasheet.co.kr datasheet pdf - http://www..net/
ac-dc and dc-dc peak-current-mode converters with integrated step-down regulator MAX17497A/max17497b maxim integrated products 4 electrical characteristics (continued) ( v in = +15v, v en/uvlo = +2v, compf = open, c in = 1 f f, c vcc = 1 f f, t a = t j = -40 n c to +125 n c, unless otherwise noted. typical values are at t a = +25 n c.) (note 2) parameter conditions min typ max units flyback/boost overcurrent hiccup timeout 32 ms minimum on-time 110 ns scompf pullup current 9 10 11 f a slope-compensation resistor range max17497b 30 200 k i default slope-compensation ramp scompf = open 100 mv/ f s step-down regulator inb voltage range 7 16 v inb quiescent supply current v inb = 16v, v outb > 3.3v 200 300 f a inb uvlo threshold rising 6.2 6.5 6.7 v falling 5.9 6.2 6.4 high-side r dson i lxb =200ma 425 800 m i low-side r dson i lxb =200ma 225 425 m i switching frequency 0.94 1 1.06 mhz lxb leakage current v lxb = v inb - 1v, v lxb = v pgndb + 1v, t a = +25 n c 0.1 1 f a lxb dead time (note 4) 5 ns v outb output-voltage accuracy 7v < v inb <16v, 50ma < i out < 600ma 3.245 3.3 3.355 v v outb input bias current v outb = 3.3v 7 10 f a peak current-limit fault threshold v outb = 3.1v 0.9 1.1 1.23 a runaway current-limit threshold v outb < 100mv 1.05 1.25 1.45 a soft-start duration count v inb > 7v 2048 cycles number of peak current-limit hits before hiccup timeout 8 hits number of runaway current-limit hits before hiccup timeout 1 hits overcurrent hiccup timeout 32,768 cycles minimum on-time 100 ns resetn resetn output leakage current (off-state) v resetn = 5v, t a = +25 n c -1 +1 f a resetn output voltage (on-state) i resetn = 10ma 0 0.4 v resetn higher thresholds eafn rising 93.5 95 96.5 % outb rising 93.5 95 96.5 www.datasheet.co.kr datasheet pdf - http://www..net/
ac-dc and dc-dc peak-current-mode converters with integrated step-down regulator MAX17497A/max17497b maxim integrated products 5 note 2: all devices are 100% production tested at t a = +25 n c. limits over temperature are guaranteed by design . note 3: the MAX17497A is intended for use in universal input power supplies. the internal clamp circuit at in is used to prevent the bootstrap capacitor from charging to a voltage beyond the absolute maximum rating of the device when en/uvlo is low (shutdown mode). externally limit the current to in (hence to clamp) to 2ma (max) when en/uvlo is low . note 4: guarantees cross conduction is avoided and it is not larger than specified max value to guarantee loop-regulation capability . electrical characteristics (continued) ( v in = +15v, v en/uvlo = +2v, compf = open, c in = 1 f f, c vcc = 1 f f, t a = t j = -40 n c to +125 n c, unless otherwise noted. typical values are at t a = +25 n c.) (note 2) typical operating characteristics ( v in = +15v, v en/uvlo = +2v, compf = open, c in = 1 f f, c vcc = 1 f f, t a = t j = -40 n c to +125 n c, unless otherwise noted. typical values are at t a = +25 n c.) parameter conditions min typ max units resetn lower thresholds eafn falling 90.5 92 93.5 % outb falling 90.5 92 93.5 resetn delay after eafn and v outb reach 95% regulation (MAX17497A/max17497b) 4 ms thermal shutdown thermal shutdown threshold temperature rising 160 n c thermal shutdown hysteresis 20 n c bootstrap uvlo wake-up level vs. temperature (MAX17497A) MAX17497A/b toc01 temperature (c) bootstrap uvlo wake-up level 100 80 60 40 20 0 -20 20.16 20.18 20.20 20.22 20.24 20.26 20.14 -40 120 in uvlo wake-up level vs. temperature (max17497b) MAX17497A/b toc02 temperature (c) in uvlo wake-up level (v) 100 80 60 40 20 0 -20 4.15 -40 120 3.95 4.00 4.05 4.10 3.90 in uvlo shutdown level vs. temperature (MAX17497A / max17497b) MAX17497A/b toc03 temperature (c) in uvlo shutdown level (v) 100 80 60 40 20 0 -20 4.015 -40 120 3.975 3.980 3.985 3.990 3.995 4.000 4.005 4.010 www.datasheet.co.kr datasheet pdf - http://www..net/
ac-dc and dc-dc peak-current-mode converters with integrated step-down regulator MAX17497A/max17497b maxim integrated products 6 typical operating characteristics (continued) ( v in = +15v, v en/uvlo = +2v, compf = open, c in = 1 f f, c vcc = 1 f f, t a = t j = -40 n c to +125 n c, unless otherwise noted. typical values are at t a = +25 n c.) en / uvlo rising level vs. temperature (MAX17497A /max17497b) MAX17497A/b toc04 temperature (c) en / uvlo rising level (v) 100 80 60 40 20 0 -20 1.235 -40 120 1.215 1.220 1.225 1.230 1.210 ovi rising level vs. temperature (MAX17497A / max17497b) MAX17497A/b toc06 temperature (c) ovi rising level (v) 100 80 60 40 20 0 -20 1.225 1.210 -40 120 1.215 1.220 in current under uvlo vs. temperature (MAX17497A /max17497b) MAX17497A/b toc08 temperature (c) in current under uvlo ( a) 100 80 60 40 20 0 -20 30 -40 120 22 24 26 28 20 en / uvlo falling level vs. temperature (MAX17497A / max17497b) MAX17497A/b toc05 temperature (c) en / uvlo falling level (v) 100 80 60 40 20 0 -20 1.145 1.150 1.155 1.160 1.165 1.170 1.140 -40 120 ovi falling level vs. temperature (MAX17497A /max17497b) MAX17497A/b toc07 temperature (c) ovi falling level (v) 100 80 60 40 20 0 -20 1.160 -40 120 1.140 1.145 1.150 1.155 1.135 in current during switching vs. temperature MAX17497A/b toc09 temperature (c) 100 80 60 40 20 0 -20 2.6 2.8 3.0 3.2 3.4 3.6 2.4 -40 120 in current during switching (ma) www.datasheet.co.kr datasheet pdf - http://www..net/
maxim integrated products 7 ac-dc and dc-dc peak-current-mode converters with integrated step-down regulator MAX17497A/max17497b typical operating characteristics (continued) ( v in = +15v, v en/uvlo = +2v, compf = open, c in = 1 f f, c vcc = 1 f f, t a = t j = -40 n c to +125 n c, unless otherwise noted. typical values are at t a = +25 n c.) lxf and primary current waveform MAX17497A/b toc10 2s /div v lxf 100v/div i pri 1a /div MAX17497A/b toc12 4ms /div enable shutdown waveform (full load) v dc 200v/div v outf 10v/div v outb 2v/div en / uvlo 5v/div peak current limit (ilimf) vs. rlimf at room temperature MAX17497A/b toc14 rlimf at room temperature (k i ) peak current limit (ilimf) (ma) 70 60 40 50 20 30 10 200 400 600 800 1000 1200 1400 1600 1800 0 08 0 enable startup waveform (full load) MAX17497A/b toc11 4ms /div v dc 200v/div v outf 10v/div v outb 2v/div en / uvlo 5v/div resetn waveform MAX17497A/b toc13 2ms /div v resetn 5v/div v outf 5v/div v outb 2v/div peak-current limit at rlimf = 100ki vs. temperature MAX17497A/b toc15 temperature (c) 100 80 60 40 20 0 -20 1.95 1.96 1.97 1.98 1.99 2.00 1.94 -40 120 peak-current limit (a) www.datasheet.co.kr datasheet pdf - http://www..net/
maxim integrated products 8 ac-dc and dc-dc peak-current-mode converters with integrated step-down regulator MAX17497A/max17497b typical operating characteristics (continued) ( v in = +15v, v en/uvlo = +2v, compf = open, c in = 1 f f, c vcc = 1 f f, t a = t j = -40 n c to +125 n c, unless otherwise noted. typical values are at t a = +25 n c.) transient response (flyback) MAX17497A/b toc16 1ms /div v outf (ac) 200mv/div i load 0.5a /div bode plot (flyback regulator) MAX17497A/b toc18 0dbm 67 89 12 34 56 78 91 23 4 gain 10db/div phase 36/div bw = 6.9khz pm = 55 v outb vs. temperature MAX17497A/b toc20 temperature (c) v outb voltage (v) 0 -20 -40 80 60 40 20 3.26 3.27 3.28 3.29 3.30 3.31 3.32 3.33 3.34 hiccup overcurrent protection (flyback regulator) MAX17497A/b toc17 10ms /div v dc 50v/div v outf 5v/div i pri 0.5a /div inb wake-up level vs. temperature MAX17497A/b toc19 temperature (c) 100 80 60 40 20 0 -20 6.48 6.41 -40 120 inb wake-up level (a) 6.42 6.43 6.44 6.45 6.46 6.47 v outb vs. inb voltage MAX17497A/b toc21 inb voltage (v) v outb voltage (v) 8 61 6 14 12 10 3. 31 0 3. 313 3. 316 3. 319 3. 322 3. 325 3. 328 www.datasheet.co.kr datasheet pdf - http://www..net/
maxim integrated products 9 ac-dc and dc-dc peak-current-mode converters with integrated step-down regulator MAX17497A/max17497b typical operating characteristics (continued) ( v in = +15v, v en/uvlo = +2v, compf = open, c in = 1 f f, c vcc = 1 f f, t a = t j = -40 n c to +125 n c, unless otherwise noted. typical values are at t a = +25 n c.) lxb and inductor waveform MAX17497A/b toc22 400ns /div i lxb 0.5a /div v lxb 5v/div load step on buck regulator MAX17497A/b toc24 1ms /div v outb 50mv/div i load 0.2a /div efficiency graph vs. load current (flyback regulator) MAX17497A/b toc26 load current (a) e ffi ci en cy (% ) 0 10 20 30 40 50 60 70 80 90 100 00 .2 0. 40 .6 0. 81 .0 1. 21 .4 v dc = 310v v outb vs. load current MAX17497A/b toc23 load current, i outb (a) v outb voltage (v) 3. 31 0 3. 315 3. 32 0 3. 325 3. 33 00 .1 0. 20 .3 0. 40 .5 0. 6 bode plot (buck regulator) MAX17497A/b toc25 0dbm 67 89 12 34 56 78 91 23 4 gain 10db/div phase 36/div bw = 110khz pm = 57 efficiency vs. load current (buck regulator) load current (a) efficiency (%) 0.5 0.4 0.3 0.2 0.1 10 20 30 40 50 60 70 80 90 100 0 0 0.6 MAX17497A/b toc27 v inb = 15v www.datasheet.co.kr datasheet pdf - http://www..net/
ac-dc and dc-dc peak-current-mode converters with integrated step-down regulator MAX17497A/max17497b maxim integrated products 10 pin description pin configuration pin name function 1 en/uvlo enable/undervoltage-lockout pin. drive to > 1.23v to start the devices. to externally program the uvlo threshold of the input supply, connect a resistor-divider between input supply en/uvlo and sgnd. 2 v cc linear regulator output. connect input bypass capacitor of at least 1 f f from v cc to sgnd as close as possible to the ic. 3 ovi overvoltage comparator input. connect a resistor-divider between the input supply (ovi) and sgnd to set the input overvoltage threshold. 4 rlimf current-limit setting pin. connect a resistor between rlimf and sgnd to set the peak-current limit for nonisolated flyback converter. peak-current limit defaults to 500ma if unconnected. 5 scompf slope compensation input pin. connect a resistor between scompf and sgnd to set slope comp ramp. connect to v cc for minimum slope comp. see the programming the slope compensation for the flyback/boost converter (scompf) section. 6 eafn feedback/inverting input of the error amplifier for nonisolated flyback converter. connect to midpoint of resistor-divider from the positive terminal of the output capacitor of the flyback/boost converter to sgnd. 7 compf error-amplifier output of flyback/boost converter. connect the frequency-compensation network between compf and sgnd. see figure 9. 15 16 14 13 6 5 7 v cc rlimf 8 en / uvlo lxb outb inb 12 pgndf 4 12 11 9 lxf ep in ssf compf eafn scompf + ovi pgndb 3 10 resetn tqfn top view MAX17497A max17497b www.datasheet.co.kr datasheet pdf - http://www..net/
ac-dc and dc-dc peak-current-mode converters with integrated step-down regulator MAX17497A/max17497b maxim integrated products 11 pin description (continued) detailed description the MAX17497A is optimized for implementing a noniso - lated offline flyback converter with output power of up to 30w and a 3.3v, 600ma power rail using the on-board synchronous step-down regulator. the output voltage of the flyback converter serves as the input supply voltage to the on-board 3.3v integrated synchronous step-down regulator. the outputs of the flyback converter and step- down regulator are regulated with independent feedback loops, thus providing two accurately controlled voltages for the system. if needed, more semi-regulated outputs can be generated using additional secondary windings on the flyback converter transformer. the max17497b is optimized for implementing a nonisolated flyback/boost converter up to 15w and a 3.3v, 600ma synchronous step-down regulator in low-voltage dc-dc applications down to 4.5v dc. see the figure 1 for more information. input voltage range the MAX17497A has different rising and falling uvlo thresholds on the in pin than those of the max17497b. the thresholds for the MAX17497A are optimized for implementing power-supply startup schemes typically used for offline ac-dc power supplies. the MAX17497A is therefore well suited for operation from the recti - fied dc bus in ac-dc power-supply applications typi - cally encountered in electric metering and other low- power industrial power-supply applications. as such, the MAX17497A has no limitation on the maximum input voltage as long as the external components are rated suitably and the maximum operating voltages of the MAX17497A are respected. the MAX17497A can successfully be used in universal input rectified (85v to 265v ac) bus applications, rectified 3-phase dc bus applications, and telecom (36v to 72v dc) applications. pin name function 8 ssf soft-start pin for flyback/boost converter. connect a capacitor from ssf to sgnd to set the soft-start time interval. 9 outb feedback for step-down regulator. connects outb to the positive terminal of the step-down regulator output capacitor. 10 pgndb power ground for step-down regulator 11 lxb external inductor connection for step-down regulator. connect to one end of the output inductor. connect the other end of output inductor to output capacitor. 12 inb internal step-down regulator input. connect inb to either v outf , the output of flyback/boost converter, or directly to the dc input source, as needed in the application. bypass inb to pgndb with a 2.2 f f minimum ceramic capacitor. 13 resetn open-drain output. resetn goes high when both the outputs are within 5% of their regulation point. resetn goes low when either of the outputs falls below 92% of their regulation value. 14 pgndf power ground for flyback/boost converter 15 lxf external transformer/inductor connection for flyback/boost converter 16 in internal linear regulator input. connect in to the input-voltage source. bypass in to pgndf with ceramic capacitor of at least 1 f f. ep exposed pad. internally connected to sgnd. connect ep to a large copper plane at sgnd potential to provide adequate thermal dissipation. connect ep (sgnd) to pgndf at a single point. www.datasheet.co.kr datasheet pdf - http://www..net/
ac-dc and dc-dc peak-current-mode converters with integrated step-down regulator MAX17497A/max17497b maxim integrated products 12 the max17497b is intended for implementing a noniso - lated flyback/boost converter with an on-board 60v rated n-channel mosfet. the in pin of the max17497b has a maximum operating voltage of 36v. the max17497b implements rising and falling thresholds on the in pin that assume power-supply startup schemes, typical of lower voltage dc-dc applications, down to an input voltage of 4.5v dc. therefore, flyback/boost converters with a 4.5v to 36v supply voltage range can be implemented with the max17497b. see the startup operation section for more details on power-supply startup schemes for both devices. the on-board synchronous step-down regulator is rated for a 16v (max) operating input voltage. linear regulator (v cc ) the devices have an internal linear regulator powered from the in pin. the output of the linear regulator is con - nected to the v cc pin and should be decoupled with a 1 f f capacitor to ground for stable operation. the v cc regulator output supplies the operating current for the devices. the maximum operating voltage of the in pin is 29v for the MAX17497A and 36v for the max17497b. configuring the power stage (lxf) the devices use an internal nmosfet to implement internal current sensing for current-mode control and overcurrent protection of the flyback/boost converter. to facilitate this, the drain of the internal nmosfet is connected to the source of the external mosfet in the MAX17497A application. the gate of the external mosfet is connected to the in pin. ensure by design that the in pin voltage does not exceed the maximum operating gate-voltage rating of the external mosfet. the external mosfet gate-source voltage is controlled by the switching action of the internal nmosfet, while also sensing the source current of the external mosfet. in the max17497b application, the lxf pin is directly connected to either the flyback transformer primary wind - ing or to the boost-converter inductor. maximum duty cycle the MAX17497A operates at a maximum duty cycle of 49%. the max17497b offers a maximum duty cycle of 93% to implement both flyback and boost converters involving large input-to-output voltage ratios in dc-dc applications. the on-board synchronous step-down reg - ulator has a maximum duty cycle of 85% and is internally compensated for stable operation. resetn power-good signal the devices include a resetn signal that serves as a power-good signal to the system. resetn is an open- drain signal and requires a pullup resistor to the pre - ferred supply voltage. the resetn signal monitors both the flyback/boost output and the synchronous step-down regulator output, pulling high when both outputs are at 95% (typ) of their regulation values. the resetn signal pulls low when either of the outputs fall below 92% (typ) of their regulation values. sequencing the MAX17497A is typically configured such that the output of the flyback converter serves as the input source to the integrated synchronous step-down regulator. because the synchronous step-down regulator has a 6.5v input uvlo threshold, the 3.3v output always comes up after the output of the flyback converter. figure 2 shows the sequencing of the MAX17497A outputs configured as described above. the sequencing for the devices is identical when the max17497b is configured as either a flyback or boost output generating the input supply voltage for the integrated step-down regulator. the step- down regulator can also operate from an independent 7v to 16v dc supply. in this case, the step-down regulator starts up when its inb pin voltage exceeds 7v, provided that the en/uvlo pin voltage is greater than 1.23v (typ). soft-start the devices implement soft-start operation for the flyback/ boost converter, as well as the synchronous step-down regulator. a capacitor connected to the ssf pin programs the soft-start period for the flyback/boost converter, while the step-down regulator has a fixed internal digital soft- start scheme. the step-down regulator includes soft-start duration of 2ms. see the programming the soft-start of the flyback/boost converter (ssf) section for more details on selection of the ssf capacitor. www.datasheet.co.kr datasheet pdf - http://www..net/
ac-dc and dc-dc peak-current-mode converters with integrated step-down regulator MAX17497A/max17497b maxim integrated products 13 figure 1. MAX17497A/max17497b block diagram ldo pok 5v, 50ma v cc en / uvlo in ovi rlimf scomf eafn comf chipen 1.23v 1.23v 1.23v 1.23v 1.23v v outb pgndb lxb inb restein pgndf lxf ssf 1.17v inb pok chipen en_buck comp 250mv rlimfint chipen v ss fix_slope v scompf slope compensation 10a 10a 33v clamp (MAX17497A only) osc v cs clk control logic and driver 8 peak or 1 runaway control logic and driver runaway hiccup v sum 10a chipen hiccup v cs v scompf peak pwk runaway hiccup v csb 8 peak or 1 runaway 1.23v 1v v csbsum v csbsum inb chipen v outb eafn v csb ssdonef ssdonef i slope ssdoneb peak pwm clk clk v sum compf ref 1.23v MAX17497A max17497b ssdoneb step-down soft-start www.datasheet.co.kr datasheet pdf - http://www..net/
ac-dc and dc-dc peak-current-mode converters with integrated step-down regulator MAX17497A/max17497b maxim integrated products 14 spread-spectrum factory option for emi-sensitive applications, a spread-spectrum- enabled version of the device can be requested from the factory. the frequency-dithering feature modulates the switching frequency by q 10% at a rate of 1/16 the switching frequency. this spread-spectrum-modulation technique spreads the energy of switching-frequency harmonics over a wider band while reducing their peaks, helping to meet stringent emi goals. applications information startup voltage and input overvoltage- protection setting (en/uvlo, ovi) the devices en/uvlo pin serves as an enable/disable input, as well as an accurate programmable input uvlo pin. the devices do not commence startup operations unless the en/uvlo pin voltage exceeds 1.23v (typ). the devices turn off if the en/uvlo pin voltage falls below 1.17v (typ). a resistor-divider from the input dc bus to ground can be used to divide down and apply a fraction of the input dc voltage (v dc ) to the en/uvlo pin. the values of the resistor-divider can be selected such that the en/uvlo pin voltage exceeds the 1.23v (typ) turn-on threshold at the desired input dc bus volt - age. the same resistor-divider can be modified with an additional resistor (r ovi ) to implement input overvoltage protection in addition to the en/uvlo functionality, as shown in figure 3 . when voltage at the ovi pin exceeds 1.23v (typ), the devices stop switching and resume switching operations only if voltage at the ovi pin falls below 1.17v (typ). for given values of startup dc input voltage (v start ), and input overvoltage-protection volt - age (v ovi ), the resistor values for the divider can be cal - culated as follows, assuming a 24.9k i resistor for r ovi : ovi en ovi start v r r 1k v ?? = ?? ?? ?? where r ovi is in k i and v start and v ovi are in volts. start sum ovi en v r r r 1k 1.23 ?? = + ?? ?? ?? ?? ?? where r en and r ovi is in k i and v ovi is in volts. r sum may need to be implemented as equal multiple resistors in series ( r dc1 , r dc2 , r dc3 ) such that voltage across each resistor is limited to its maximum operating voltage. sum dc1 dc1 dc1 r rrr k 3 = = = ? figure 2. sequencing of MAX17497A/max17497b output voltage rails en/uvlo 6.5v t ssf t ssb resetn t resetn 4ms 95% 92% v outb v outf 95% www.datasheet.co.kr datasheet pdf - http://www..net/
ac-dc and dc-dc peak-current-mode converters with integrated step-down regulator MAX17497A/max17497b maxim integrated products 15 figure 3. programming en/uvlo and ovi figure 4. MAX17497A rc-based startup circuit startup operation the MAX17497A is optimized for implementing offline flyback converters. a cost-effective rc startup circuit is used in offline applications. in this startup method, when the input dc voltage is applied, the startup resistor (r start ) charges the startup capacitor (c start ), causing the voltage at the in pin to increase towards the rising in uvlo threshold (20v typ). during this time, the MAX17497A draws a low startup current of 20 f a (typ) through r start . when the voltage at in reaches the rising in uvlo threshold, the MAX17497A commences switching operations and drives the internal nmosfet whose drain is connected to the lxf pin. in this con - dition, the max17947a draws 2.5ma current in from c start , in addition to the current required to switch the gate of the external nmosfet (q1). since this current cannot be supported by the current through r start , the voltage on c start starts to drop. when suitably configured as show in figure 4 , the external nmosfet is switched by the lxf pin and the flyback converter generates an output voltage (v outf ) bootstrapped to the in pin through the diode (d2). if v outf exceeds the sum of 6v and the drop across d2 before the voltage on c start falls below 5v, then the in volt - age is sustained by v outf , allowing the MAX17497A to continue operating with energy from v outf . the large hysteresis (15v typ) of the MAX17497A allows for a small startup capacitor (c start ). the low startup current (20 f a typ) allows the use of a large startup resis - tor (r start ), thus reducing power dissipation at higher dc bus voltages. r start may need to be implemented as equal, multiple resistors in series (r in1 , r in2 and r in3 ) to share the applied high dc voltage in offline applications, such that the voltage across each resistor is limited to the maximum continuous operating-voltage rating. r start and c start can be calculated as: gate sw ssf start in 6 q ft c i f 10 10 ?? ?? = + ?? ?? ?? ?? where i in is the supply current drawn at the in pin in ma, q gate is the gate charge of the external mosfet used in nc, f sw is the switching frequency of the converter in hz, and t ssf is the soft-start time programmed for the flyback converter in ms (see the programming the soft-start of the flyback/boost converter (ssf) section). ( ) start start start v 10 50 rk 1c ? = ? + ?? ?? where c start is the startup capacitor in f f. for designs that cannot accept power dissipation in the startup resistors at high dc input voltages in offline applications, the startup circuit can be set up with a current source instead of a startup resistor, as shown in figure 5 . ovi r ovi r en r sum r dc3 r dc2 r dc1 v dc en/uvlo MAX17497A max17497b r start r in3 v outf d2 v dc in lxf v cc c vcc c start r in2 r in1 MAX17497A ldo v dc v outf d1 c outf www.datasheet.co.kr datasheet pdf - http://www..net/
ac-dc and dc-dc peak-current-mode converters with integrated step-down regulator MAX17497A/max17497b maxim integrated products 16 the startup capacitor (c start ) can be calculated as follows: gate sw ssf start in 6 q ft c i f 10 10 ?? ?? = + ?? ?? ?? ?? where i in is the supply current drawn at the in pin in ma, q gate is the gate charge of the external mosfet used in nc, f sw is the switching frequency of the converter in khz, and t ssf is the soft-start time programmed for the flyback converter in ms. resistors r start and r isrc can be calculated as: start start beq1 isrc v rm 10 v rm 70 = ? = ? the in uvlo rising threshold of the max17497b is set to 3.9v with hysteresis of 200mv, optimized for low-voltage dc-dc applications down to 4.5v. for applications where the input dc voltage is low enough (e.g., 4.5v to 5.5v dc) so the power loss incurred to supply the operating current of the max17497b can be tolerated, the in pin is directly connected to the dc input ( figure 6 ). for higher dc input voltages (e.g., 16v to 32v dc), a startup circuit ( figure 7 ) can be used to minimize power dissipation in the startup circuit. in this start - up scheme, the transistor (q1) supplies the switching current until a bias winding n b comes up. the resistor (r z ) can be calculated as: z inmin r 9 (v 6.3) k = ?? where v inmin is the minimum input dc voltage. programming the soft-start of the flyback/boost converter (ssf) the devices soft-start period of the flyback/boost con - verter can be programmed by selecting the value of the capacitor connected from the ssf pin to gnd. the capacitor (c ssf ) can be calculated as: ssf ssf c 8.13 t nf = where t ssf is expressed in ms. figure 5. MAX17497A current-source-based startup circuit figure 6. max17497b typical startup circuit with in connected directly to dc input r start r in3 m 1 in q1 r isrc v outf v dc v dc v outf d1 in lxf pgndf v cc c vcc c start d2 r in2 r in1 c outf MAX17497A ldo v dc v outf in lxf np ns v cc d1 in c in c outf c vcc max17497b ldo www.datasheet.co.kr datasheet pdf - http://www..net/
ac-dc and dc-dc peak-current-mode converters with integrated step-down regulator MAX17497A/max17497b maxim integrated products 17 programming the output voltage of the flyback/boost converter (ssf) set the output voltage of the flyback/boost converter by selecting the correct values for the resistor-divider con - nected from the flyback/boost output to ground (v outf ) with the midpoint of the divider connected to the eafn pin ( figure 8 ). with r b selected in the range of 20k i to 50k i , r u can be calculated as: outf ub v r r 1k 1.23 ?? = ?? ?? ?? where r b is in k i . programming the current limit of the flyback/boost converter (rlimf) the devices include a robust overcurrent-protection scheme that protects them during overload and short- circuit conditions. for the flyback/boost converter, the devices include a cycle-by-cycle peak current limit that turns off the driver whenever the current into the lxf pin exceeds an internal limit programmed by the resistor connected from the rlimf pin to ground. the devices include a runaway current limit that protects them dur - ing high-input voltage and short-circuit conditions when there is insufficient output voltage available to restore the inductor current built up during the on-period of the flyback/boost converter. either eight consecutive occur - rences of the peak current-limit event or one occurrence of the runaway current limit trigger a hiccup mode, pro - tecting the converter by immediately suspending switch - ing for a period of time (t rstart ). this allows the over - load current to decay due to power loss in the converter resistances, load, and the output diode of the flyback/ boost converter before soft-start is attempted again. the rlimf resistor for a desired current limit (i pk ) can be calculated as: limf pk r 50 i k =? where i pk is expressed in amperes. for a given peak-current-limit setting, the runaway current limit is typically 20% higher. the peak current- limit-triggered hiccup operation is disabled until the end of soft-start, while the runaway current-limit-triggered hiccup operation is always enabled. programming the slope compensation for the flyback/boost converter (scompf) since the MAX17497A operates at a maximum duty cycle of 49%, in theory it does not require slope compensation to prevent subharmonic instability that occurs naturally in continuous peak-current-mode controlled converters operating at duty cycles greater than 50%. in practice, the MAX17497A requires a minimum amount of slope compensation to provide stable, jitter-free operation. the MAX17497A allows the user to program this default value of slope compensation simply by connecting the rlimf pin to v cc . it is recommended that discontinuous-mode designs also use this minimum amount of slope compen - sation to provide noise immunity and jitter-free operation. figure 7. max17497b typical startup circuit with bias winding to turn off q1 and reduce power dissipation figure 8. programming the output voltage of the flyback/boost converter v dc v outf lxf np ns d2 d1 in c outf max17497b in nb v cc c vcc c in r z z d1 6.3v ldo q1 r b r u eafn v outf MAX17497A max17497b www.datasheet.co.kr datasheet pdf - http://www..net/
ac-dc and dc-dc peak-current-mode converters with integrated step-down regulator MAX17497A/max17497b maxim integrated products 18 the MAX17497A flyback/boost converter can be designed to operate in discontinuous mode or to enter into continuous-conduction mode at a specific heavy- load condition for a given dc input voltage. in continu - ous-conduction mode, the flyback/boost converter needs slope compensation to avoid subharmonic instability that occurs naturally over all specified load and line condi - tions in peak-current-mode-controlled converters operat - ing at duty cycles greater than 50%. a minimum amount of slope signal is added to the sensed current signal even for converters operating below 50% duty cycles to provide stable, jitter-free operation. the scompf pin allows the user to program the necessary slope com - pensation by setting the value of the r scompf resistor connected from the scompf pin to ground: scompf e r 0.1s k = ? where the slope (s e ) is expressed in volts per microsecond. step-down overcurrent protection the devices step-down regulator includes a robust overcurrent-protection scheme that protects them during overload and short-circuit conditions. a cycle-by-cycle peak current limit turns off the high-side pmosfet switch whenever the high-side switch current exceeds an inter - nal limit of 800ma. a runaway current limit on the high- side switch current at 1a (typ) protects the device under high input-voltage short-circuit conditions when there is insufficient output voltage available to restore the induc - tor current built up during the on period of the step-down regulator. eight consecutive occurrences of the peak current-limit event or one occurrence of the runaway cur - rent limit trigger a hiccup mode to protect the converter by immediately suspending switching for a period of time (t rstartb ). this allows the overload current to decay, due to power loss in the converter resistances, and load before soft-start is attempted again. error amplifier, loop compensation, and power-stage design of the flyback/boost converter the devices flyback/boost converter requires that prop - er loop compensation be applied to the error-amplifier output to achieve stable operation. the goal of the com - pensator design is to achieve the desired closed-loop bandwidth and sufficient phase margin at the crossover frequency of the open-loop gain-transfer function of the converter. the error amplifier included in the devices is a transconductance amplifier. the compensation network used to apply the necessary loop compensation is shown in figure 9 . the flyback/boost converter can be used to implement the following converters and operating modes: ? nonisolated flyback converter in discontinuous- conduction mode (dcm flyback) ? nonisolated flyback converter in continuous-conduc - tion mode (ccm flyback) ? boost converter in discontinuous-conduction mode (dcm boost) ? boost converter in continuous-conduction mode (ccm boost) calculations for loop-compensation values (r z , c z , and c p ) for these converter types, and design procedures for power-stage components, are detailed in the following sections. dcm flyback primary inductance selection in a dcm flyback converter, the energy stored in the primary inductance of the flyback transformer is ideally delivered entirely to the output. the maximum primary- inductance value for which the converter remains in discontinuous mode at all operating conditions can be calculated as: ( ) ( ) 2 inmin max primax outf d outf sw v d 0.4 l v vi f + where d max is 0.35 for the MAX17497A and 0.7 for the max17497b, v d is the forward-voltage drop of the out - put rectifier diode on the secondary side, and f sw is the switching frequency of the power converter. choose the primary inductance value to be less than l primax . figure 9. programming the output voltage of the flyback/boost converter r z compf c z c p MAX17497A max17497b www.datasheet.co.kr datasheet pdf - http://www..net/
ac-dc and dc-dc peak-current-mode converters with integrated step-down regulator MAX17497A/max17497b maxim integrated products 19 duty-cycle calculation the accurate value of the duty cycle (d new ) for the selected primary inductance l pri can be calculated using the following equation: ( ) pri outf d outf sw new inmin 2.5 l v v i f d v + = turns ratio calculation (ns/np) transformer turns ratio (k = ns/np) can be calculated as: ( ) outf d max inmin max v v (1 d ) k vd + ? = peak/rms current calculation rms current values in the primary and secondary are needed by the transformer manufacturer to design the wire diameter for the different windings. peak current calculations are useful in setting the current limit. use the following equations to calculate the primary and second - ary peak and rms currents: maximum primary peak current: inmin new pripeak pri sw vd i lf = maximum primary rms current: new prirms pripeak d ii 3 = maximum secondary rms current: pripeak secpeak i i k = maximum secondary peak current: ( ) secpeak pri sw secrms pripeak outf d i lf ii 3v v = for current-limit setting, the peak current can be calcu - lated as: limf pripeak i i 1.2 = primary snubber selection ideally, the external nmosfet experiences a drain- source-voltage stress equal to the sum of the input volt - age and the reflected voltage across the primary wind - ing during the off period of the nmosfet. in practice, parasitic inductances and capacitors in the circuit, such as leakage inductance of the flyback transformer, cause voltage overshoot and ringing. snubber circuits are used to limit the voltage overshoots to safe levels within the voltage rating of the external nmosfet. the snubber capacitor can be calculated using the following equation: 22 lk pripeak snub 2 outf 2l i k c v = where l lk is the leakage inductance obtained from the transformer specifications (usually 1% to 2% of the pri - mary inductance). the power dissipated in the snubber resistor is calcu - lated using the following equation: 2 snub lk pripeak sw p 0.833 l i f = the snubber resistor can be calculated based on the following equation: 2 outf snub 2 snub 6.25 v r pk = the voltage rating of the snubber diode is: outf dsnub inmax v v v 2.5 k ?? = + ?? ?? output-capacitor selection x7r ceramic output capacitors are preferred in industrial applications due to their stability over temperature. the output capacitor is usually sized to support a step load of 50% of the maximum output current in the application so that the output-voltage deviation is contained to 3% of the output-voltage change. the output capacitance can be calculated as: step response outf outf it c v = ? response c sw 0.33 1 t () ff ?+ where i step is the load step, t response is the response time of the controller, d v outf is the allowable output volt - age deviation, and f c is the target closed-loop crossover frequency. f c is chosen to be 1/10 of the switching fre - quency (f sw ). for the flyback converter, the output capacitor supplies the load current when the main switch www.datasheet.co.kr datasheet pdf - http://www..net/
ac-dc and dc-dc peak-current-mode converters with integrated step-down regulator MAX17497A/max17497b maxim integrated products 20 is on, and the output-voltage ripple is therefore a function of load current and duty cycle. use the following equa - tion to calculate the output-capacitor ripple: 2 new pripeak outf coutf pripeak sw outf d i ki v 2i f c ?? ? ?? ?? ?? ?= where i outf is the load current and d new is the duty cycle at minimum input voltage. input-capacitor selection the MAX17497A is optimized for implementing offline ac-dc converters. in such applications, the input capac - itor must be selected based either on the ripple due to the rectified line voltage or on hold-up time requirements. hold-up time can be defined as the time period over which the power supply should regulate its output volt - age from the instant the ac power fails. the max17497b is useful for implementing low-voltage dc-dc applica - tions where the switching-frequency ripple must be used to calculate the input capacitor. in both cases, the capacitor must be sized to meet rms current require - ments for reliable operation. capacitor selection based on switching ripple (max17497b): for dc-dc applications, x7r ceramic capacitors are recommended due to their stability over the operating temperature range. the esr and esl of a ceramic capacitor are relatively low, so the ripple voltage is dominated by the capacitive component. for the fly - back converter, the input capacitor supplies the current when the main switch is on. the following equation cal - culates the input capacitor for a specified peak-to-peak input switching-ripple voltage (v in_rip ): ( ) 2 new pripeak new in sw in_rip d i 1 0.5 d c 2f v ?? ? ?? = capacitor selection based on rectified line voltage ripple (MAX17497A): for the flyback converter, the input capacitor supplies the input current when the diode recti - fier is off. the voltage discharge (v in_rip ), due to the input average current, should be within the limits specified: pripeak new in ripple in_rip 0.5 i d c fv = where f ripple , the input ac ripple frequency equal to the supply frequency for half-wave rectification, is two times the ac supply frequency for full-wave rectification. capacitor selection based on hold-up time requirements (MAX17497A): for a given output power (p holdup ) that needs to be delivered during hold-up time (t holdup ), dc bus voltage at which the ac supply fails (v infail ), and the minimum dc bus voltage at which the converter can regulate the output voltages (v inmin ), the input capacitor (c in ) is estimated as: ( ) holdup holdup in 22 infail inmin 3p t c vv = ? the input capacitor rms current can be calculated as follows: 2 inmin max incrms sw pri 0.6 v d i fl = external mosfet selection mosfet selection criteria includes the maximum drain voltage, peak/rms current in the primary, and the maximum allowable power dissipation of the package without exceeding the junction temperature limits. the voltage seen by the mosfet drain is the sum of the input voltage, the reflected secondary voltage on the trans - former primary, and the leakage inductance spike. the mosfets absolute maximum v ds rating must be higher than the worst-case drain voltage: outf d dsmax inmax vv v v 2.5 k ?? + ?? =+ ?? ?? ?? ?? the drain-current rating of the external mosfet is selected to be greater than the worst-case peak current- limit setting. secondary diode selection secondary diode-selection criteria includes the maxi - mum reverse voltage, average current in the secondary, reverse recovery time, junction capacitance, and the maximum allowable power dissipation of the package. the voltage stress on the diode is the sum of the output voltage and the reflected primary voltage. the maximum operating reverse-voltage rating must be higher than the worst-case reverse voltage: secdiode inmax outf v 1.25 (k v v ) = + the current rating of the secondary diode should be selected such that the power loss in the diode (given as the product of forward-voltage drop and the average www.datasheet.co.kr datasheet pdf - http://www..net/
ac-dc and dc-dc peak-current-mode converters with integrated step-down regulator MAX17497A/max17497b maxim integrated products 21 diode current) should be low enough to ensure that the junction temperature is within limits. this necessitates the diode-current rating be in the order of 2 x i outf to 3x i outf . select fast-recovery diodes with a recovery time less than 50ns, or schottky diodes with low junction capacitance. error-amplifier compensation design the loop-compensation values are calculated as: 2 sw outf outf p z pri sw 0 . 1f 1 vi f r 450 2l f ?? ?? ?? + ?? ?? ?? ?? = outf p outf outf i f vc = z zp p z sw 1 c rf 1 c rf = = the devices switching frequency (f sw ) can be ob - tained from the electrical characteristics section. in a typical application, the integrated step-down regulator is fed off the flyback converters output. the step-down regulator poses negative input impedance or constant input power behavior. due to this behavior, the loop bandwidth measured for the flyback converter would be smaller than the design bandwidth. ccm flyback transformer turns ratio calculation (k = ns/np) the transformer turns ratio can be calculated using the following equation: ( ) out d max inmin max v v (1 d ) k vd + ? = where d max is the duty cycle assumed at minimum input (0.35 for the MAX17497A and 0.7 for the max17497b). primary inductance calculation calculate the primary inductance based on the ripple: ( ) outf d nom pri outf sw v v (1 d ) k l 2i f + ? = ? where d nom , the nominal duty cycle at nominal operat - ing dc input voltage (v innom ), is given as: ( ) ( ) out d nom innom out d v vk d v v vk + = ?? + + ?? the output current, down to which the flyback converter should operate in ccm, is determined by selection of the fraction a in the above primary inductance formula. for example, a should be selected as 0.15 so that the converter operates in ccm down to 15% of the maxi - mum output-load current. since the ripple in the primary current waveform is a function of duty cycle, and is maximum-at-maximum dc input voltage, the maximum (worst-case) load current, down to which the converter operates in ccm, occurs at maximum operating dc input voltage. v d is the forward drop of the selected output diode at maximum output current. peak and rms current calculation rms current values in the primary and secondary are needed by the transformer manufacturer to design the wire diameter for the different windings. peak-current calculations are useful in setting the current limit. use the following equations to calculate the primary and second - ary peak and rms currents: maximum primary peak current: outf inmin max pripeak max pri sw ik vd i 1d 2l f ?? ?? = + ?? ?? ? ?? ?? maximum primary rms current: ( ) 22 pripeak pri pripeak pri prirms max i ii i i 3 d +? ? ? = where d i pri is the ripple current in the primary current waveform, and is given by: inmin max pri pri sw vd i lf ?? ?= ?? ?? maximum secondary peak current: pripeak secpeak i i k = maximum secondary rms current: www.datasheet.co.kr datasheet pdf - http://www..net/
ac-dc and dc-dc peak-current-mode converters with integrated step-down regulator MAX17497A/max17497b maxim integrated products 22 ( ) 22 secpeak sec secpeak sec secrms max i ii i i 3 1d +? + ? = ? where d i sec is the ripple current in the secondary current waveform, and is given by: inmin max sec pri sw vd i l fk ?? ?= ?? ?? current-limit setting the peak current can be calculated as follows: limf pripeak i i 1.2 = primary rcd snubber selection the design procedure for rcd snubber selection is iden - tical to that outlined in the dcm flyback section. output-capacitor selection x7r ceramic output capacitors are preferred in industrial applications due to their stability over temperature. the output capacitor is usually sized to support a step load of 50% of the maximum output current in the application, such that the output-voltage deviation is contained to 3% of the output-voltage change. the output capacitance can be calculated as: step response outf outf it c v = ? response c sw 0.33 1 t () ff ?+ where i step is the load step, t response is the response time of the controller, d v outf is the allowable output voltage deviation, and f c is the target closed-loop cross - over frequency. f c is chosen to be less than 1/5 of the worst-case (lowest) rhp zero frequency (f rhp ). the right half-plane zero frequency is calculated as: 2 max outf zrhp 2 max pri outf (1 d ) v f 2d li k ? = for the ccm flyback converter, the output capacitor supplies the load current when the main switch is on, and therefore the output-voltage ripple is a function of load current and duty cycle. use the following equation to estimate the output-voltage ripple: outf max coutf sw outf id v fc ?= input-capacitor selection the design procedure for input capacitor selection is identical to that outlined in the dcm flyback section. external mosfet selection the design procedure for external mosfet selection is identical to that outlined in the dcm flyback section. secondary diode selection the design procedure for secondary diode selection is identical to that outlined in the dcm flyback section. error-amplifier compensation design in the ccm flyback converter, the primary inductance and the equivalent load resistance introduces a right half-plane zero at the following frequency: 2 max outf zrhp 2 max pri outf (1 d ) v f 2d li k ? = the loop-compensation values are calculated as: 2 outf rhp z max p 225 i f r1 (1 d ) 5 f ?? = + ?? ? ?? where f p , the pole due to output capacitor and load, is given by: max outf p outf outf (1 d ) i f 2c v + = the above selection sets the loop-gain crossover fre - quency (f c , where the loop gain equals 1) equal to 1/5 the right half-plane zero frequency: zrhp c f f 5 with the control-loop zero placed at the load pole fre - quency: z zp 1 c 2r f = with the high-frequency pole placed at 1/2 the switching frequency: p z sw 1 c rf = www.datasheet.co.kr datasheet pdf - http://www..net/
ac-dc and dc-dc peak-current-mode converters with integrated step-down regulator MAX17497A/max17497b maxim integrated products 23 dcm boost in a dcm boost converter, the inductor current returns to zero in every switching cycle. energy stored during the on-time of the main switch is delivered entirely to the load in each switching cycle. inductance selection the design procedure starts with calculating the boost converters input inductor, such that it operates in dcm at all operating line and load conditions. the critical inductance required to maintain dcm operation is cal - culated as: ( ) 2 outf inmin inmin in 2 outf outf sw v v v 0.4 l iv f ?? ? ?? ?? where v inmin is the minimum input voltage. peak/rms current calculation to set the current limit, the peak current in the inductor can be calculated as: limf pk i i 1.2 = where i pk is given by: outf inmin outf pk inmin swmin 2 (v v ) i i lf ?? ? = ?? ?? l inmin is the minimum value of the input inductor, taking into account tolerance and saturation effects. f swmin is the minimum switching frequency for the max17497b from the electrical characteristics section . output-capacitor selection x7r ceramic output capacitors are preferred in industrial applications due to their stability over temperature. the output capacitor is usually sized to support a step load of 50% of the maximum output current in the application, such that the output-voltage deviation is contained to 3% of the output-voltage change. the output capacitance can be calculated as: step response out outf it c v = ? response c sw 0.33 1 t () ff ?+ where i step is the load step, t response is the response time of the controller, d v outf is the allowable output- voltage deviation, and f c is the target closed-loop cross - over frequency. f c is chosen to be 1/10 the switching frequency (f sw ). for the boost converter, the output capacitor supplies the load current when the main switch is on, and therefore the output-voltage ripple is a function of duty cycle and load current. use the following equa - tion to calculate the output-capacitor ripple: outf in pk coutf inmin outf i li v vc ?= input-capacitor selection the value of the required input capacitor can be calcu - lated based on the ripple allowed on the input dc bus. the size of the input capacitor should be based on the rms value of the ac current handled by it. the calcula - tions are as: outf inf inmin swmin max 3.75 i c v f (1 d ) ?? = ?? ? ?? the capacitor rms can be calculated as: pk cin_rms i i 23 = error-amplifier compensation design the loop-compensation values for the error amplifier can now be calculated as: ( ) dc m z dc sw g g 10 c g 10 nf 2f = = where g dc , the dc gain of the power stage is given as: 2 outf inmin sw outf in dc 2 outf inmin outf 8 (v v ) f v l g (2v v ) i ? = ? outf outf outf inmin z outf z outf inmin v c (v v ) r i c (2v v ) ? = ? where v inmin is the minimum operating input voltage and i outf is the maximum load current: outf p z c esr c r = www.datasheet.co.kr datasheet pdf - http://www..net/
ac-dc and dc-dc peak-current-mode converters with integrated step-down regulator MAX17497A/max17497b maxim integrated products 24 slope compensation in theory, the dcm boost converter does not require slope compensation for stable operation. in practice, the converter needs a minimum amount of slope for good noise immunity at very light loads. the minimum slope is set for the devices by connecting the scompf pin to the v cc pin. output diode selection the voltage rating of the output diode for the boost converter ideally equals the output voltage of the boost converter. in practice, parasitic inductances and capaci - tances in the circuit interact to produce voltage over - shoot during the turn-off transition of the diode that occurs when the main switch turns on. the diode rating should therefore be selected with the necessary margin to accommodate this extra voltage stress. a voltage rat - ing of 1.3 x v outf provides the necessary design margin in most cases. the current rating of the output diode should be selected such that the power loss in the diode (given as the product of forward-voltage drop and the average diode current) should be low enough to ensure that the junction temperature is within limits. this necessitates the diode current rating to be in the order of 2 x i outf to 3 x i outf . select fast-recovery diodes with a recovery time less than 50ns, or schottky diodes with low junction capacitance. internal mosfet rms current calculation the voltage stress on the internal mosfet, whose drain is connected to lxf, ideally equals the sum of the out - put voltage and the forward drop of the output diode. in practice, voltage overshoot and ringing occur due to action of circuit parasitic elements during the turn-off transition. the maximum rating of the internal nmosfet of the devices is 65v, making it possible to design boost converters with output voltages up to 48v, with sufficient margin for voltage overshoot and ringing. the rms current into lxf is useful in estimating the conduction loss in the internal nmosfet and is given as: 3 pk ins sw lxf_rms inmin i lf i 3v = where i pk is the peak current calculated at the lowest operating input voltage (v inmin ). ccm boost in a ccm boost converter, the inductor current does not return to zero during a switching cycle. since the max17497b implements a nonsynchronous boost con - verter, the inductor current enters dcm operation at load currents below a critical value, equal to 1/2 the peak-to- peak ripple in the inductor current. inductor selection the design procedure starts with calculating the boost converters input inductor at nominal input voltage for a ripple in the inductor current, equal to 30% of the maxi - mum input current: in in outf sw v d (1 d) l 0.3 i f ? = where d is the duty cycle calculated as: outf d in outf d ds outf v vv d v v (r i ) +? = +? v d is the voltage drop across the output diode of the boost converter at maximum output current, and r ds is the resistance of the internal nmosfet at lxf in the on state. peak/rms current calculation to set the current limit, the peak current in the inductor and internal nmosfet can be calculated as: outf max max outf pk inmin swmin max v d (1 d ) i i 1.2 l f (1 d) for d 0.5 ?? ? = + ?? ? ?? < outf outf pk max inmin swmin 0.25 v i i 1.2 for d 0.5 l f (1 d) ?? = + ?? ? ?? d max , the maximum duty cycle, is obtained by substitut - ing the minimum input operating voltage (v inmin ) in the equation above for duty cycle. l inmin is the minimum value of the input inductor taking into account tolerance and saturation effects. f swmin is the minimum switch - ing frequency for the max17497b from the electrical characteristics section. www.datasheet.co.kr datasheet pdf - http://www..net/
ac-dc and dc-dc peak-current-mode converters with integrated step-down regulator MAX17497A/max17497b maxim integrated products 25 output-capacitor selection x7r ceramic output capacitors are preferred in industrial applications due to their stability over temperature. the output capacitor is usually sized to support a step load of 50% of the maximum output current in the application, such that the output-voltage deviation is contained to 3% of the output-voltage change. the output capacitance can be calculated as: step response outf outf it c v = ? response c sw 0.33 1 t () ff ?+ where i step is the load step, t response is the response time of the controller, d v outf is the allowable output- voltage deviation, and f c is the target closed-loop crossover frequency. f c is chosen as 1/10 the switch - ing frequency (f sw ). for the boost converter, the output capacitor supplies the load current when the main switch is on, and therefore the output-voltage ripple is a function of duty cycle and load current. use the following equa - tion to calculate the output-capacitor ripple: outf max coutf outf sw id v cf ?= input-capacitor selection the input ceramic capacitor value required can be calculated based on the ripple allowed on the input dc bus. the input capacitor should be sized based on the rms value of the ac current handled by it. the calcula - tions are as: outf inf inmin sw max 3.75 i c v f (1 d ) ?? = ?? ? ?? the input-capacitor rms current can be calculated as: lin cin_rms i i 23 ? = where: outf max max lin max inmin swmin v d (1 d ) i for d 0.5 lf ?? ? ?= < ?? ?? outf lin max inmin swmin 0.25 v i for d 0.5 lf ?? ?= ?? ?? error-amplifier compensation design the loop-compensation values for the error amplifier can now be calculated as: 2 outf outf min z outf_min in 250 v c (1 d ) r il ? = where d min is the duty cycle at the highest operating input voltage and i outf_min is the minimum load current: outf outf z outf z vc c 2i r = p sw z 1 c fr = slope-compensation ramp the slope required to stabilize the converter at duty cycles greater than 50% can be calculated as: outf inmin e in 0.5 (0.82 v v ) s v per s l ? = where l in is in f h. output diode selection the design procedure for output diode selection is identi - cal to that outlined in the dcm boost section. internal mosfet rms current calculation the voltage stress on the internal mosfet, whose drain is connected to lxf, ideally equals the sum of the output voltage and the forward drop of the output diode. in prac - tice, voltage overshoot and ringing occur due to action of circuit parasitic elements during the turn-off transition. the devices maximum rating of the internal nmosfet is 65v, making it possible to design boost converters with output voltages up to 48v, with sufficient margin for voltage overshoot and ringing. the rms current into lxf is useful in estimating the conduction loss in the internal nmosfet and is given as: outf max lxf_rms max id i (1 d ) = ? where d max is the duty cycle at the lowest operating input voltage and i outf is the maximum load current. www.datasheet.co.kr datasheet pdf - http://www..net/
ac-dc and dc-dc peak-current-mode converters with integrated step-down regulator MAX17497A/max17497b maxim integrated products 26 thermal considerations it should be ensured that the junction temperature of the devices does not exceed +125 n c under the operating conditions specified for the power supply. the power dis - sipated in the devices to operate can be calculated using the following equation: in in in p vi = where v in is the voltage applied at the in pin and i in is operating supply current. the internal nmosfet experiences conduction loss and transition loss when switching between on and off states. these losses are calculated as: ( ) 2 conduction lxf_rms dson_lxf transition inmax pk r f sw p ir p 0.5 v i t t f = = + where t r and t f are the rise and fall times of the internal nmosfet in ccm operation. in dcm operation, because the switch current starts from zero only, t f exists and the transition loss equation changes to: transition inmax pk f sw p 0.5 v i t f = additional loss occurs in the system in every switch - ing cycle due to energy stored in the drain-source capacitance of the internal mosfet being lost when the mosfet turns on and discharges the drain-source capacitance voltage to zero. this loss is estimated as: 2 cap ds dsmax sw p 0.5 c v f = the internal step-down regulator also has similar losses that affect the temperature rise of the part. these losses are estimated as: ( ) 2 lossbuck outb dc out 1 p p ( 1) i r = ?? where e is the efficiency of the internal step-down regulator at the output current (i outb ), and r dc is the dc resistance of the output inductor. the total power loss in the devices can be calculated from the following equation: loss in conduction transition cap lossbuck p pp p p p =+ ++ + the maximum power that can be dissipated in the devices is 1666mw at +70 n c temperature. the power- dissipation capability should be derated as the tem - perature rises above +70 n c at 21mw/ n c. for a multilayer board, the thermal-performance metrics for the package are given below: ja 48 c/ w = jc 10 c/ w = the junction temperature rise of the devices can be estimated at any given maximum ambient temperature (t a_max ) from the following equation: ( ) j_max a_max ja loss tt p = + if the application has a thermal-management system that ensures that the devices exposed pad is maintained at a given temperature (t ep_max ) by using proper heatsinks, then the junction temperature rise can be estimated at any given maximum ambient temperature from the fol - lowing equation: ( ) j_max ep_max jc loss tt p = + www.datasheet.co.kr datasheet pdf - http://www..net/
ac-dc and dc-dc peak-current-mode converters with integrated step-down regulator MAX17497A/max17497b maxim integrated products 27 figure 10. MAX17497A typical application example (e.g., smart meter) c13 10f/25v inb r22 10ki v cc resetn resetn c17 10f/6.3v pgndb lxb v out3 3.3v, 0.6a l2 15h pgndf in in ep rlimf ssf r11 30ki c12 47nf v cc scompf v cc c4 2.2nf eafn vout1 r17 49.9ki r19 10ki r18 559ki r5 82ki r6 20.5ki en/uvlo ovi r4 2.2mi r3 2.2mi r2 2.2mi v in r15 3mi r14 3mi 3mi r12 3mi in c6 0.47f /35v r23 10ki n2 fqt1n80tf c7 2.2f/50v v out1 q1 bc849cw d2 rb160m-60tr v in r10 1.2mi c3 100f/ 400v c2 100f/ 400v l1 1mh r9 1.2mi r8 1.2mi c1 0.1f/ 1kv d1 sskc-13-f line neutral 85v ac to 265v ac r7 1.2mi r1 10i outb v out3 v out1 lxf d4 ss1200-ltp d3 us1k-tp d5 bzt52c18-7f n1 fqd1n80tm c8 0.1f/25v c18 10f/ 25v ss1200-ltp d6 c14 22f/ 25v c15 22f/ 25v c10 2.2nf/ 250v r16 100ki/0.5w r20 10i t1 c16 open v out1 in v out2 v out1 15v, 0.5a v out2 6v, 0.15a pgnd MAX17497A compf c11 47pf c9 22nf www.datasheet.co.kr datasheet pdf - http://www..net/
ac-dc and dc-dc peak-current-mode converters with integrated step-down regulator MAX17497A/max17497b maxim integrated products 28 figure 11. max17497b typical application example max17497b in v out1 r8 49.9ki v cc c9 10f/6.3v r9 10ki c8 10f/25v v cc scompf eafn compf outb pgndb lxb inb resetn resetn v out2 3.3v, 0.6a l2 15h pgndf in l1 15h d1 ss26-tp c7 4.7f/35v v out1 24v, 0.2a lxf in v cc ovi ep r7 25ki r6 481ki r5 15ki r2 12ki r4 184ki r3 9.92ki c5 10nf c4 2.2f c2 0.1f c1 47f in v in pgnd 10.8v to 13.2v dc in rlimf ssf r1 75ki c3 47nf c6 47pf en/uvlo www.datasheet.co.kr datasheet pdf - http://www..net/
ac-dc and dc-dc peak-current-mode converters with integrated step-down regulator MAX17497A/max17497b maxim integrated products 29 layout, grounding, and bypassing all connections carrying pulsed currents must be very short and as wide as possible. the inductance of these connections must be kept to an absolute minimum due to the high di/dt of the currents in high-frequency switch - ing power converters. this implies that the loop areas for forward and return pulsed currents in various parts of the circuit should be minimized. additionally, small-current loop areas reduce radiated emi. similarly, the heatsink of the main mosfet presents a dv/dt source; therefore, the surface area of the mosfet heatsink should be mini - mized as much as possible. ground planes must be kept as intact as possible. the ground plane for the power section of the converter should be kept separate from the analog ground plane, except for a connection at the least noisy section of the power ground plane, typically the return of the input filter capacitor. the negative terminal of the filter capacitor, the ground return of the power switch, and the current- sensing resistor must be close together. pcb layout also affects the thermal performance of the design. a number of thermal vias that connect to a large ground plane should be provided under the exposed pad of the part for efficient heat dissipation. for a sample layout that ensures first-pass success, refer to the MAX17497A evaluation kit layout available at www.maxim-ic.com . for universal ac input designs, follow all applicable safety regulations. offline power supplies can require ul, vde, and other similar agency approvals. ordering information package information for the latest package outline information and land patterns (footprints), go to www.maxim-ic.com/packages . note that a +, #, or - in the package code indicates rohs status only. package drawings may show a different suffix character, but the drawing pertains to the package regardless of rohs status. + denotes a lead(pb)-free/rohs-compliant package. * future productcontact factory for availability. part temp range pin-package description MAX17497A ate+ -40 n c to +125 n c 16 tqfn 250khz, offline flyback/forward converter with 3.3v, 600ma synchronous step-down converter max17497b ate+* -40 n c to +125 n c 16 tqfn 500khz, flyback/boost converter with 3.3v, 600ma synchronous step-down converter package type package code outline no. land pattern no. 16 tqfn t1633+5 21-0136 90-0032 www.datasheet.co.kr datasheet pdf - http://www..net/
maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circuit patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. the parametric values (min and max limits) shown in the electrical characteristics table are guaranteed. other parametric values quoted in this data sheet are provided for guidance. maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 30 ? 2011 maxim integrated products maxim is a registered trademark of maxim integrated products, inc. ac-dc and dc-dc peak-current-mode converters with integrated step-down regulator MAX17497A/max17497b revision history revision number revision date description pages changed 0 11/11 initial release www.datasheet.co.kr datasheet pdf - http://www..net/

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